In the field of a server or a high performance computer (HPC), a transmission capacity between a central processing unit (CPU) and an external interface increases by the improvement of performance of a multi-core central processing unit (CPU: an arithmetic processing device).
Related techniques are disclosed in, for example, Japanese Laid-Open Patent Publication Nos. 2014-102399, 2008-046312, and 09-005549, or in, for example, a non-patent document, M. Webster et. al., “A statistical analysis of conditioned launch for gigabit Ethernet links using multimode fiber,” Journal of Lightwave Technology, vol. 17, pp1532-1541, (1999).